VLSI_Toolkit

Interactive chip-design tools for beginners

Number conversion, MOSFET, RISC-V, pipeline, timing and FSM tools for chip design. Free, and it all runs in your browser.

☕ Buy us a chai
Word width

MOSFET Calculator

Model Textbook equations, checked by about 90,000 automated tests (square law, gm, ro, body effect, subthreshold slope, sizing). For learning and hand calculations; confirm sign-off numbers with SPICE and your foundry models.

Device

Process parameters

Defaults are generic teaching values, not foundry data. λ is computed as 1 / (VA × L), so a longer channel gives a higher ro.

Bias magnitudes, so PMOS uses positive numbers too

Size from a target

Square law, saturation, λ ignored. Pick two values you know and get W/L.

Curves

Data table

CMOS inverter

An NMOS to ground and a PMOS to VDD, both driven by Vin, built from the process preset and L chosen above. Drag Wp/Wn to move the switching threshold VM, or sweep Vin and watch both transistors change region.

VIL and VIH are where the slope is −1; NML = VIL − VOL and NMH = VOH − VIH. Faint curves show the same inverter with Wp/Wn = 0.5, 1, 4 and 8: a wider PMOS pulls VM up. Electron mobility is higher, so a symmetric inverter needs a PMOS about µn/µp times wider.

Analog VLSI notes

Regions of operation

Voltages below are magnitudes. For PMOS, swap the signs of Vgs, Vds and Vth and the equations stay the same. Vov = Vgs − Vth.

  • Weak inversion (Vgs below Vth): the current is a diffusion current. Id grows exponentially with Vgs, one decade for every n·Vt·ln10 (about 80 mV with n = 1.3). Very efficient, very slow, and the device needs a large W/L.
  • Triode (Vds below Vov): the channel reaches the drain and the device acts as a voltage-controlled resistor. Use it as a switch or an active resistor.
  • Saturation (Vds at or above Vov): the channel pinches off at the drain. Id depends mainly on Vgs and weakly on Vds. This is where amplifiers and current sources live.
  • Moderate inversion: the blend between the two. This calculator uses one smooth expression, Veff = 2nVt·ln(1 + e^(Vov/2nVt)), in place of Vov: it becomes Vov in strong inversion and an exponential in weak inversion, so gm/Id falls gradually through this region.
Triode: Id = k'(W/L)·[Vov·Vds − Vds²/2]·(1 + λVds) Sat: Id = ½·k'(W/L)·Vov²·(1 + λVds) Weak: Id ∝ exp(Vov / nVt)·(1 − exp(−Vds / Vt)) All: Vov above is replaced by Veff = 2nVt·ln(1 + exp(Vov / 2nVt)) k' = µ·Cox, Cox = εox / tox
Small-signal parameters
  • gm = ∂Id/∂Vgs. How much current change one volt of gate drive buys. In saturation gm = k'(W/L)·Vov = 2Id/Vov = √(2k'(W/L)Id).
  • gmb = η·gm. The body acts as a second, weaker gate. η = γ / (2√(2φF + Vsb)), typically 0.1 to 0.3.
  • ro = 1/gds ≈ 1/(λId) = VA/Id. The finite slope of the saturation curve. Doubling L doubles VA, so ro doubles at the same current.
  • Intrinsic gain gm·ro ≈ 2/(λVov). The most gain one transistor can give with an ideal current-source load. It rises with L and falls with Vov, which is why analog designers use longer channels and moderate overdrive.
Body effect and channel-length modulation

Body effect. A positive source-to-body voltage widens the depletion region and raises the threshold: Vth = Vth0 + γ(√(2φF + Vsb) − √(2φF)). It lowers a source follower's gain further below 1, to about gm/(gm + gmb), and it weakens stacked transistors and pass gates. Tie the source to the body where the process allows it, for example with a separate well.

Channel-length modulation. As Vds rises, the pinch-off point moves toward the source and the effective channel shortens, so Id creeps up. λ scales roughly as 1/L, which is why the calculator takes VA per micron.

The gm/Id method

gm/Id tells you how much transconductance you get per microamp. It depends only on how far into inversion the device is, not on W directly, so it is a handy design variable.

  • Weak inversion: the maximum, 1/(nVt), about 25 to 30 V⁻¹ at room temperature. Best efficiency, lowest fT, biggest area.
  • Strong inversion: 2/Vov. With Vov = 0.2 V that is 10 V⁻¹.
  • Moderate inversion (roughly 10 to 20 V⁻¹): a common compromise between power, speed and area for low-power analog.

The gm/Id–Vgs curve in this tool shows the square-law hyperbola dotted and the weak-inversion ceiling as a flat line.

Speed and noise

fT. The frequency where the current gain drops to 1: fT = gm / (2π(Cgs + Cgd + Cgb)). In strong inversion this is about 3µVov / (4πL²), so speed grows with overdrive and falls fast with L. In saturation Cgs ≈ ⅔·W·L·Cox plus overlap.

Thermal noise. Drain-current noise is 4kTγ·gm with γ ≈ ⅔ in strong inversion and about ½ in weak inversion. Referred to the gate it is 4kTγ/gm, so a larger gm lowers input noise. Short channels often show higher γ.

Flicker (1/f) noise falls with gate area W·L·Cox and mismatch falls as 1/√(WL). Neither is modeled here, but both push analog devices toward large area.

Quick design recipes
  • Common-source amplifier: Av = −gm·(ro ∥ RL). With an ideal current-source load it tops out at −gm·ro.
  • Current mirror: use long L for a high ro and low λ mismatch, moderate Vov (150 to 250 mV) for matching, and equal Vds on both sides.
  • Differential pair: each side carries half the tail current, so gm = 2·(Itail/2)/Vov = Itail/Vov.
  • Switch: Ron ≈ 1 / (k'(W/L)·(Vgs − Vth)) for small Vds. Note that Vth rises with Vsb as the source voltage rises.
  • Headroom: keep Vds at least 50 to 100 mV above Vov so process and temperature shifts do not push the device into triode.
What this model leaves out

This is a first-pass hand-calculation model: square law with channel-length modulation, body effect and a smooth weak-inversion join. It does not include velocity saturation (short channels behave closer to Id ∝ Vov than Vov²), DIBL, mobility degradation, gate leakage, parasitic source and drain resistance, temperature dependence of Vth and µ, or layout effects. Use it for sizing and sanity checks, then verify with SPICE and the foundry's BSIM models.